Among all the other things I have on my plate, this summer I’ll be coding a simulator for a combinatorial architecture proposed back in 1998 by Berkovitch and Berkovitch. Their paper “presents a new principle for microprocessor design based on a pairwise-balanced combinatorial arrangement of processing and memory elements.” This was suggested to me by Prof Alan Ling.
Just an exercise at this point. Should be fun. ;)
 E. Berkovitch and S. Berkovitch. A combinatorial architecture for instruction-level parallelism. Microprocessors and Microsystems 22 (1998) 23-31.